

module inst_rom (
    input wire ce,
    input wire[5:0] addr,
    output reg[31:0] inst
);

    reg[31:0] inst_mem[63:0];

    initial $readmemh("inst_rom.data", inst_mem);
    
    always @(*) begin
        if (ce == 1'b0) begin
            inst <= 32'h0;
        end else begin
            inst <= inst_mem[addr];
        end// if
    end//always
endmodule
